Code and source data for "Echo state graph neural networks with analogue random resistor arrays." The code are tested on Ubuntu 20.04, CUDA 11.1 with PyTorch 1.9.0 and torch-geometric 1.7.2. Both the graph datasets and the source data are included in the `data` folder.

By quantizing weights with different precision for different parts of a network, mixed-precision quantization promises to reduce the hardware cost and improve the speed of deep neural network (DNN) accelerators that typically operate with a fixed quantization scheme. However, the additional control needed, and the decreased hardware efficiency arising from multi-precision operations have made mixed-precision quantization schemes challenging to deploy in practice. In this paper, a practical mixed-precision quantization framework called MSD that leverages the...

This repo serves as the official implementation of the paper "DPACS: Hardware Accelerated Dynamic Neural Network Pruning through Algorithm-Architecture Co-design".
DPCAS is an algorithm-architecture co-design framework for dynamic neural network pruning. It utilizes a hardware-aware dynamic spatial and channel pruning mechanism in conjunction with a dynamic dataflow engine in hardware to facilitate efficient processing of the pruned network.
The code is also avaliable on github: https://github.com/CASR-HKU/DPACS
Our group page: https://casr.eee.hku.hk/publication/dpacs-asplos23/

Code and source data for "Echo state graph neural networks with analogue random resistor arrays." The code are tested on Ubuntu 20.04, CUDA 11.1 with PyTorch 1.9.0 and torch-geometric 1.7.2. Both the graph datasets and the source data are included in the `data` folder.

This repository serves as the official code release of the paper "REMOT: A Hardware-Software Architecture for Attention-Guided Multi-Object Tracking with Dynamic Vision Sensors on FPGAs" (FPGA'22).
REMOT is a hardware/software architecture for Multi-Object Tracking using Dynamic Vision Sensors on FPGA. It's designed around the concept of an attention unit (AU). Each AU will only pay attention to a specific region of interest, which is designed to changed as the object moves. In REMOT, a layer...

This repository archives the artifact evaluation materials for the paper Model-Platform Optimized Deep Neural Network Accelerator Generation through Mixed-integer Geometric Programming, which is accepted by FCCM2023.
The repository is also available on GitHub: https://github.com/CASR-HKU/AGNA-FCCM2023

This repository serves as the official code release of the paper "REMOT: A Hardware-Software Architecture for Attention-Guided Multi-Object Tracking with Dynamic Vision Sensors on FPGAs" (FPGA'22).
REMOT is a hardware/software architecture for Multi-Object Tracking using Dynamic Vision Sensors on FPGA. It's designed around the concept of an attention unit (AU). Each AU will only pay attention to a specific region of interest, which is designed to changed as the object moves. In REMOT, a layer...

This repository serves as the official code release of the paper "REMOT: A Hardware-Software Architecture for Attention-Guided Multi-Object Tracking with Dynamic Vision Sensors on FPGAs" (FPGA'22).
REMOT is a hardware/software architecture for Multi-Object Tracking using Dynamic Vision Sensors on FPGA. It's designed around the concept of an attention unit (AU). Each AU will only pay attention to a specific region of interest, which is designed to changed as the object moves. In REMOT, a layer...

By quantizing weights with different precision for different parts of a network, mixed-precision quantization promises to reduce the hardware cost and improve the speed of deep neural network (DNN) accelerators that typically operate with a fixed quantization scheme. However, the additional control needed, and the decreased hardware efficiency arising from multi-precision operations have made mixed-precision quantization schemes challenging to deploy in practice. In this paper, a practical mixed-precision quantization framework called MSD that leverages the...

This repo serves as the official implementation of the paper "DPACS: Hardware Accelerated Dynamic Neural Network Pruning through Algorithm-Architecture Co-design".
DPCAS is an algorithm-architecture co-design framework for dynamic neural network pruning. It utilizes a hardware-aware dynamic spatial and channel pruning mechanism in conjunction with a dynamic dataflow engine in hardware to facilitate efficient processing of the pruned network.
The code is also avaliable on github: https://github.com/CASR-HKU/DPACS
Our group page: https://casr.eee.hku.hk/publication/dpacs-asplos23/