Power and Thermal Effects of SRAM vs. Latch-Mix Design Styles and Clock Gating Choices

Yingmin Li & Kevin Skadron
This paper studies the impact on energy efficiency and thermal behavior of design style and clock-gating style in queue and array structures. These structures are major sources of power dissipation, and both design styles and various clock gating schemes can be found in modern, high-performance proces- sors. Although some work in the circuits domain has explored these issues from a power perspective, thermal treatments are less common, and we are not aware of any work...
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