Improved test efficiency in IP cores using ModelSim verification tool

Junfeng Li
The complexity of modern digital circuit has increased enormously particularly in the context of paradigm shift from system-on-board to designs embracing embedded cores-based System-on-Chips (SoCs). This increased complexity of circuits in turn results in a huge challenge of setting up their appropriate fault testing environments. Though lots of efforts have been taken to rapidly test the very large scale integrated (VLSI) circuit chips with very reasonable cost, with advances in technology, new frontiers also emerged....
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